What Is a Microvia? Types, Design Rules & HDI Guide

Table of Contents

1. 1. What Is a Microvia? Definition and Basic Structure
2. 2. Microvia Types: Stacked, Staggered, and Skip Vias
3. 3. Microvias and HDI Stackup Classifications (1+N+1, Any-Layer)
4. 4. How Are Microvias Manufactured? Laser Drilling to Plating
5. 5. Microvia Design Rules: Aspect Ratio, Pad Size, and IPC Standards
6. 6. Microvia Reliability: Common Failure Modes and How to Avoid Them
7. 7. Microvia Cost and DFM Considerations
8. 8. Where Microvias Are Used: Real Applications
9. 9. Microvia vs. Blind Via vs. Buried Via vs. Through-Hole
10. 10. Frequently Asked Questions

1. What Is a Microvia? Definition and Basic Structure

A microvia is a very small plated hole, typically ≤150 µm (0.15 mm) in diameter, used to connect a single dielectric layer to the adjacent conductive layer in a High-Density Interconnect (HDI) PCB. Unlike a mechanically drilled through-hole or blind/buried via, a microvia is almost always formed with a laser rather than a mechanical drill bit, which is what allows it to be drilled so small and so precisely.

A microvia consists of three basic elements, the same as any plated via: a copper barrel that carries the electrical connection, a capture pad on the layer being connected, and, where relevant, an anti-pad clearance on any reference plane it passes through. The key difference is scale and depth: because a microvia only ever spans one dielectric layer (never the full board thickness), its aspect ratio stays low even at a tiny diameter, which is precisely what makes it manufacturable at such fine geometry.

Microvias are the enabling technology behind HDI PCBs. Without them, fine-pitch BGA packages, wearable electronics, and 5G RF modules simply could not be routed at their required density using conventional through-hole or blind/buried via technology.

2. Microvia Types: Stacked, Staggered, and Skip Vias

Once a design needs more than one layer of microvias to reach an inner layer, the designer has to decide how successive microvia layers are arranged relative to each other. This choice has a direct impact on routing density, reliability, and cost.

• Stacked Microvias: Each microvia is drilled and plated directly on top of the one below it, forming a vertical stack through multiple dielectric layers. Stacked microvias offer the highest routing density and the shortest electrical path, but they require the via in the lower layer to be filled and capped with copper (see Section 4) before the next microvia can be drilled on top — otherwise the stack will not survive lamination and plating.
• Staggered Microvias: Each microvia connects to the next one through a short trace on the intermediate layer instead of landing directly on top of it. This avoids the need for via filling between every layer, which lowers manufacturing cost and risk, at the expense of slightly more board area.
• Skip Vias: A single microvia is laser-drilled through two dielectric layers in one pass to reach a layer that is not immediately adjacent. Skip vias reduce the total via count but require tighter process control, since the aspect ratio and the laser energy needed both increase.

Whether a microvia needs to be filled, capped, or simply plated-and-tented is governed by IPC-4761, and the correct classification depends entirely on which of the three stacking approaches above is used.

3. Microvias and HDI Stackup Classifications (1+N+1, Any-Layer)

Microvia layer count is what defines an HDI board's official classification. Understanding this is essential before sending a design to a fabricator, since quoting and DFM checks are built around these categories:

• 1+N+1: One microvia layer on each side of a conventional (mechanically drilled) multilayer core. This is the entry point into HDI and the most cost-effective HDI structure.
• 2+N+2: Two sequential microvia layers on each side of the core, usually using staggered or stacked microvias to reach the second layer. Routing density roughly doubles compared to 1+N+1, but so does the number of lamination cycles.
• Any-Layer HDI: Every layer pair in the stack is connected with microvias, with no conventional mechanically drilled core layer at all. This is the highest-density and highest-cost structure, generally reserved for the most space-constrained designs such as smartphone mainboards and advanced package substrates.

Each additional microvia layer adds a full sequential lamination-drill-plate cycle to the manufacturing process, which is the main reason cost rises steeply as you move from 1+N+1 toward Any-Layer. NextPCB's advanced manufacturing line supports up to HDI III designs and Any-Layer HDI (ELIC) on boards up to 32 layers, per its Advanced PCB Manufacturing Capabilities.

For a broader framework on deciding whether a design needs this level of via complexity at all, see: High-Speed Stackups for HDI PCBs ,  Multilayer PCB Design Fundamentals, and Common HDI Stackup Types (1+N+1, 2+N+2 and More).

4. How Are Microvias Manufactured? Laser Drilling to Plating

Microvia fabrication is a fundamentally different process from mechanical via drilling, built around laser systems rather than drill bits. The typical sequence is:

1. Layer Build-Up: A thin dielectric layer (resin-coated copper foil or prepreg) is laminated onto the existing core, and copper is deposited or laminated on top.
2. Laser Drilling: A CO² or UV laser ablates the dielectric to form the microvia hole. CO² lasers are faster and lower cost, and are typically used for larger microvias (≥100 µm) drilled through resin-coated copper; UV lasers offer finer resolution and are used for the smallest, most precise geometries, including drilling directly through thin copper foil without a separate etch step.
3. Desmear: Residual resin (smear) left on the bottom of the hole from the laser process is removed chemically or with plasma, exposing clean copper for reliable plating.
4. Copper Deposition and Plating: Electroless copper deposition forms a conductive seed layer inside the hole, followed by electrolytic copper plating to build the barrel to full thickness.
5. Filling and Planarization (if required): For stacked microvias or Via-in-Pad applications, the hole is filled with conductive or non-conductive epoxy and capped with copper, then planarized so the surface is flat enough for reliable SMT assembly.

This build-up-and-drill sequence is repeated once per microvia layer, which is why HDI stackup classification (Section 3) tracks so closely with process cost and lead time.

5. Microvia Design Rules: Aspect Ratio, Pad Size, and IPC Standards

Microvia design is governed primarily by IPC-2226 (Design Standard for HDI PCBs) and IPC-6012 (Qualification and Performance Specification), which define the manufacturing and reliability limits a design must respect:

• Diameter: Typically 75–150 µm at the fine end of production capability, narrowing toward the 150 µm definition ceiling as designs move to more conservative, lower-cost stackups.
• Aspect Ratio: Because a microvia only spans one dielectric layer, its depth-to-diameter ratio is generally kept at or below 0.8:1 to 1:1 for reliable plating — a much tighter limit than the 20:1 aspect ratio NextPCB supports for standard mechanically drilled through-hole vias, precisely because the plating chemistry has far less room to work with at microvia scale.
• Capture Pad Diameter: Generally at least 0.30 mm to provide adequate annular ring and account for laser-drilling position tolerance, consistent with the annular ring principles covered in Annular Rings in Multilayer PCB Design.
• Dielectric Thickness: The build-up dielectric layer that a microvia spans is usually 40–80 µm thick, which directly sets the practical diameter and aspect ratio limits above.
• Stacking Rules: Fabricators typically cap the number of directly stacked microvia layers (commonly 2–4) before requiring a staggered transition, to control cumulative plating stress through the stack.

Verified NextPCB Microvia Manufacturing Capability — the figures below are published production specifications, not general industry estimates, and confirm the design rules above at NextPCB's own facility:

Source: Advanced PCB Manufacturing Capabilities. The 0.075 mm minimum laser-drill figure is also confirmed by NextPCB's internal drilling capability chart, which lists laser-drilled round holes at 0.075–0.15 mm, with mechanical drilling used above that range for cost reasons. Registration tolerance for laser-drilled microvias (±2 mil, roughly ±0.05 mm) is noticeably tighter than the ±0.075 mm position tolerance typical of standard mechanical drilling, which is a direct result of the laser process referenced in Section 4. These numbers are current production specifications, not a substitute for a project-specific DFM review — always confirm exact limits for a given stackup before finalizing a design.

6. Microvia Reliability: Common Failure Modes and How to Avoid Them

Because microvias are so small and sit close to the board surface, they fail differently than larger through-hole or blind/buried vias. The most common failure modes are:

• Corner Cracking: Thermal cycling stresses the plated copper at the transition between the via barrel and the capture pad, where the geometry changes sharply. This is the single most common microvia reliability failure and is why IPC-6012 defines specific thermal shock and microsection test requirements for HDI boards.
• Resin Recession/Smear: Incomplete desmear leaves residual resin at the base of the via, preventing a full copper-to-copper connection to the layer below and causing intermittent or high-resistance connections.
• Voiding in Filled Vias: Incomplete fill during the epoxy or copper-fill step leaves air voids inside the barrel, which can later trap moisture or collapse under thermal stress, especially in stacked microvia structures.
• Pad Cratering: On Via-in-Pad designs, mechanical stress during SMT reflow or board flexure can crack the laminate beneath the pad if the via and fill are not fully planarized.

Mitigating these risks in practice comes down to respecting the aspect ratio and stacking limits in Section 5, specifying the correct IPC-4761 fill/cap class for the application, and requesting microsection reports from the fabricator on new stackups before committing to volume production.

7. Microvia Cost and DFM Considerations

Microvia cost is driven by three factors that compound with each other:

• Number of Sequential Lamination Cycles: Each microvia layer requires its own laminate-drill-plate cycle before the next layer can be added, directly multiplying process time and yield risk as stackup classification moves from 1+N+1 toward Any-Layer (Section 3).
• Fill and Cap Requirements: Stacked microvias and Via-in-Pad structures require additional epoxy fill and copper cap steps that flat or staggered microvias may not need.
• Yield Loss at Tighter Geometries: As diameter drops below ~100 µm or aspect ratio approaches 1:1, plating yield drops and inspection requirements increase, both of which raise effective unit cost.

The most effective DFM lever available to a designer is choosing the lowest HDI classification and the least aggressive microvia stacking that still meets the routing requirement — over-specifying Any-Layer or fully stacked microvias when staggered 1+N+1 would route the same design is one of the most common sources of unnecessary cost in HDI projects.

Upload your Gerber files and HQDFM will flag microvia aspect ratio, stacking, and pad size issues automatically — no sign-up required. For a full side-by-side of standard vs. advanced fabrication (layer count, materials, cost, and lead time), see Advanced PCB Manufacturing Capabilities.

8. Where Microvias Are Used: Real Applications

Microvias are found wherever routing density is the primary constraint rather than raw current or voltage handling:

• Smartphones and Wearables: Any-Layer HDI mainboards rely entirely on microvias to fit dense component placement into a few square centimeters of board area.
• Fine-Pitch BGA and CSP Packages: As BGA pitch drops below 0.8 mm, dog-bone fanout with conventional vias runs out of routing channels, making microvia-based fanout (often combined with Via-in-Pad) the only practical option.
• 5G RF and mmWave Modules: Short microvia barrels introduce less parasitic inductance than longer through-hole vias, which matters directly at the frequencies these modules operate at.
• Medical Implantables and Hearing Aids: Extreme miniaturization requirements make microvias one of the few technologies capable of routing multilayer circuitry into the available footprint.
• Automotive ADAS Modules: Sensor fusion and radar processing boards increasingly combine fine-pitch BGA processors with microvia-based HDI stackups to meet both size and reliability requirements.

9. Microvia vs. Blind Via vs. Buried Via vs. Through-Hole

The core distinction is simple: blind and buried vias can span multiple layers using mechanical drilling, while a microvia by definition spans exactly one dielectric layer and is laser drilled. For a full breakdown of when blind vias are preferable to buried vias (and vice versa), see: Blind Vias and Buried Vias: What Is the Difference in PCB? For guidance on deciding whether your design needs any of these advanced via types at all versus a simpler through-hole approach, see: Back-Drill vs. Blind/Buried Vias: Cost, Signal Integrity, and Manufacturing Scalability.

10. Frequently Asked Questions

What is the maximum diameter of a microvia?

Industry practice generally defines a microvia as ≤150 µm (0.15 mm) in diameter. Holes larger than this are typically classified as blind vias even if laser-drilled, since they no longer fall under the IPC-2226 microvia aspect ratio rules.

Are microvias reliable?

Yes, when kept within an aspect ratio of 0.8:1 to 1:1 and manufactured to IPC-6012 Class 3 HDI qualification standards. The majority of microvia field failures trace back to over-aggressive stacking or aspect ratios pushed beyond the fabricator's proven process window, not the technology itself.

How much more expensive is a microvia than a standard via?

There is no fixed multiplier — cost scales with the number of sequential microvia layers in the stackup and whether fill/cap is required, not with the microvia technology in isolation. A single 1+N+1 microvia layer typically adds a modest premium over a conventional multilayer board; an Any-Layer HDI stackup with multiple sequential lamination cycles can cost several times more.

Can microvias be stacked directly on top of each other?

Yes, but each stacked microvia must be filled and capped with copper before the next layer is drilled on top of it, or the stack will not survive lamination. Staggered microvias avoid this requirement at the cost of slightly more board area.

Do microvias need to be laser drilled?

In production practice, yes. Mechanical drilling cannot reliably achieve the sub-150 µm diameters and tight position tolerance that microvia design rules require, which is why laser drilling (CO² or UV) is the standard process across the industry.

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About the Author

Lolly Zheng- Sales Account Manager at NextPCB.com

Four years of proven sales experience across electronic components and PCBA industries, with strong expertise in key account acquisition, customer relationship management, and contract negotiations. Focused on driving revenue growth through strategic client development and solution-based selling. Experienced in expanding high-value accounts, securing long-term partnerships, and consistently exceeding sales targets in competitive markets.

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