Through Glass Via (TGV): The Core Interconnect Technology for Glass Substrates

A through-glass via (TGV) is a vertical conductive via formed through a glass substrate or glass interposer, used to electrically connect the two sides of the glass or link stacked layers — functionally similar to the through-silicon via (TSV) used in silicon-based packaging. TGV is one of the key process bottlenecks determining whether glass substrate technology can scale, since via precision, aspect ratio, and metallization quality directly determine interconnect density and reliability.

Why Glass Substrates Need TGV

Glass itself is an insulator. To achieve multi-layer routing interconnects on a glass core substrate or glass interposer, vias must first be formed through the glass, then metallized (typically with copper fill) to form a conductive path. The precision and yield of TGV processing largely determine whether glass substrates can match or exceed the interconnect density of organic substrates or silicon interposers. This is one of the most closely watched process bottlenecks in the glass substrate technology chain.

1. Cross-section diagram of a glass core packaging substrate showing through-glass via (TGV), redistribution layer (RDL), glass interposer, flip chip, and printed circuit board layers
2. (Images sourced from the web. If you believe any image infringes your copyright, please contact us for removal.)

Why TGV Can't Simply Reuse PCB Mechanical Drilling

In conventional PCB manufacturing, microvias are typically formed by mechanical drilling or CO2 laser ablation of organic material — a mature, well-understood process. But glass has a fundamentally different mechanical behavior from organic laminate or copper foil: glass has essentially no plastic deformation capacity. Under mechanical stress, it doesn't bend and yield the way organic material does — it fractures brittlely along a crack propagation path. This means that once a mechanical drill bit contacts glass, cracks can easily propagate unpredictably through the substrate rather than staying confined to the intended via location, often scrapping the entire panel rather than failing just one via. This is why TGV processing must rely on non-contact laser-based approaches rather than simply reusing the mechanical drilling or punching equipment the PCB industry has already perfected — glass substrates and PCBs may look like the same "drill-then-plate" logic on the surface, but the material failure modes are entirely different, and process inheritance between the two is actually quite limited.

1. TSV process flow diagram showing DRIE deep silicon etching, dual carrier bonding and de-bonding, and RDL formation

TGV vs. TSV: Key Differences

Process flow diagram of through-silicon via (TSV) fabrication using deep reactive-ion etching (DRIE)

Main TGV Processing Methods

Three main TGV processing approaches are currently being explored in the industry, each with its own trade-offs, and none has emerged as the dominant path yet:

• Laser-Induced Deep Etching (LIDE): Ultra-short pulse lasers exploit nonlinear absorption to create a localized modified region along the intended via path inside the glass (the material structure is "pre-damaged" by the laser but not yet removed). A wet chemical etch then preferentially reacts along the modified region, selectively removing material to form the via. Because wet etching is fundamentally an isotropic diffusion-driven reaction, etchant near the via opening has longer contact time and a higher removal rate than etchant deeper inside the via, which is the physical root cause of the "taper" commonly seen in TGVs — an hourglass-shaped cross-section that narrows slightly toward the middle rather than a perfect straight cylinder. Better taper control generally makes subsequent metallization fill more uniform, which is why taper has become a key metric for comparing the maturity of different LIDE processes.
• Direct Laser Ablation: Uses a laser to directly ablate material and form the via. The process is relatively simple, but demands tighter control over via-wall smoothness and the heat-affected zone.
• Photosensitive Glass: Uses a specially formulated photosensitive glass material, forming the via structure through an expose-and-develop process. Well suited to applications requiring highly consistent via geometry.

Key Process Parameters

The core TGV process metrics are via diameter, aspect ratio, and metallization yield. Public industry sources indicate aspect ratios in the range of 15:1 have been demonstrated, with via diameters achievable down to the micron scale. A higher aspect ratio means higher-density vertical interconnects can be achieved on thinner glass substrates, but it also raises the bar for metallization fill uniformity.

Main Technical Challenges for TGV

• Metallization yield: Copper electroplating fill is fundamentally a diffusion-limited reaction — the deeper the via and the higher the aspect ratio, the harder it is for ion replenishment in the middle of the via to keep pace with deposition at the via opening. This can cause a "premature seal" at the opening before the middle has actually filled, leaving a void inside the via. These voids become stress-concentration points and potential open-circuit failure origins during subsequent thermal cycling. High-aspect-ratio TGVs typically require pulse plating and additive formulation adjustments to achieve bottom-up filling — parameters tuned for low-aspect-ratio vias generally cannot simply be reused.
• Via-wall quality and reliability: Micro-cracks generated during laser processing can affect long-term reliability. Some suppliers are validating "no micro-crack" process routes.
• Mass-production equipment maturity: Panel-level processing equipment differs from silicon wafer production lines, and the supporting equipment ecosystem is still being built out.

Panel-Level Yield Economics: Bigger Area Doesn't Automatically Mean Lower Cost

One of glass substrate's major selling points is that it can be processed at panel sizes far larger than a traditional 300mm silicon wafer (e.g., 500mm-class), theoretically lowering the per-unit-area interconnect cost. But this logic carries a hidden assumption: the defect density per unit area must stay constant — or ideally decrease. Under the yield models common in the semiconductor industry, the probability that a substrate contains at least one fatal defect rises as area increases. If TGV process defect rates (voids, micro-cracks, uncontrolled taper) don't fall in step with growing panel size, panel-level packaging won't automatically deliver a cost advantage — it may instead amplify cost volatility, since scrapped area is larger and each scrap event is more costly. This is why TGV yield improvement tends to draw more industry attention than simply "can we drill this via at all" — what really determines the pace of commercialization is whether defect density can keep up with the rate of panel-size expansion.

Frequently Asked Questions

Can TGV and TSV be used interchangeably?

They serve a similar function — both provide vertical interconnects — but the base material and processing methods are completely different. In the near term, they're more likely to develop in parallel depending on the application, rather than replace one another.

What stage is TGV technology at today?

TGV remains in process-route validation and small-scale pilot production. The three main processing methods (laser-induced etching, direct laser ablation, photosensitive glass) have not yet converged on a single industry-standard path.

Which steps most affect TGV yield?

Via-wall micro-crack control and metallization fill uniformity in high-aspect-ratio vias are the two bottlenecks most frequently cited in public technical sources.

What causes the TGV "taper" issue?

Taper refers to the hourglass-shaped via cross-section that narrows slightly toward the middle, caused primarily by the isotropic diffusion nature of wet chemical etching — etchant near the via opening has longer contact time and a higher removal rate. Taper control is a key indicator of how mature a given laser-etch process is, since it directly affects downstream metallization uniformity.

Why can't TGV be drilled mechanically like a PCB via?

Because glass has essentially no plastic deformation capacity, mechanical stress causes cracks to propagate unpredictably through the substrate rather than staying confined to the intended via location, often scrapping the entire panel. This is why TGV must rely on a non-contact laser-modification-plus-etch process instead.

NextPCB provides precision drilling and plating capabilities for high-density interconnect (HDI) microvias and blind/buried vias. If your project involves these capabilities, explore NextPCB's HDI PCB manufacturing capabilities.

About the Author

Julia Wu - Senior Sales Engineer at NextPCB.com

With over 10 years of experience in the PCB industry, Julia has developed a strong technical and sales expertise. As a technical sales professional, she specializes in understanding customer needs and delivering tailored PCB solutions that drive efficiency and innovation. Julia works closely with both engineering teams and clients to ensure high-quality product development and seamless communication, helping businesses navigate the complexities of PCB design and manufacturing. Julia is dedicated to offering exceptional service and building lasting relationships in the electronics sector, ensuring that each project exceeds customer expectations.

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