This design takes the detector circuit as an example, and elaborates the method of MCM layout design using signal integrity analysis tool. First, the package parts library is expanded to meet the needs of specific circuit layout design; then APD (Advanced Package Designer) software is used to directly call the part package symbols to complete the initial layout design of the circuit; finally, combined with reflection, delay and electromagnetic compatibility The signal integrity simulation analysis results are repeatedly adjusted. The improved circuit layout and wiring reduces the reflection of the signal. The relative delay of the input signal does not exceed 0.2 ns, and the electromagnetic interference phenomenon is also suppressed to meet the signal integrity requirements.
As mentioned above, the implementation of MCM place and route includes circuit schematic generation, extended part library and final place and route completion and processing data file output. APD Layout includes Padstack (*.pad), Package Symbol (*.psm), Mechanical Symbol (*.bsm), Format Symbol (*.osm) and Shape Symbol (*.ssm), MCM layout design, All layouts must have the correct Library Packing. The MCM design software comes with a package library that often cannot meet the specific design requirements. Only after the part library is expanded can the parts be directly called for layout design and final process file output. First, use the Padstack Editor software to expand the parts library, then package the circuit, and export the electrical connection netlist file to the APD software through Concept HDL, and finally complete the circuit layout. Throughout the design, 16 Padstacks and 81 package symbols were defined, 251 calls to Padstack and 89 calls to the functional unit, which shared 251 component package symbol pins and 229 function unit pins.
It should be noted that, in the specific design, if you use Orcad to design the circuit, you must convert the file generated by Orcad into the mcm file of the APD software. However, since the converted mcm file has a problem similar to brd, the Concept HDL software is used to export the netlist file, and then the network cable topology is extracted for simulation. In order to reduce the simulation time, a sub-module simulation method is adopted.
Simulation Analysis - IBIS Model
Like other circuit analysis software, Spectra Quest must first provide accurate electrical models of circuit components in order to obtain accurate simulation results. The Spectra Quest software uses the IBIS model. The IBIS (Input/Output Buffer Information Specification) model uses I/V and V/T tables to describe the characteristics of I/O cells and pins. It is a fast and accurate I/O BUFFER based on V/I curve. Modular method. It provides a standard file format for recording parameters such as driver or receiver output impedance, rise/fall time, and input load, which are read by Spectra Quest. The IBIS model has the information needed for signal integrity analysis and is ideal for calculation and simulation of high frequency effects such as oscillation and crosstalk.
The Sigxplorer inside Spectra Quest accepts the IBIS model and then transforms it into a unique design modeling language DML to model complex I/O structures. Moreover, the Constraint Manager in Sigxplorer manages the parameters used in the simulation and embeds them into subsequent place and route constraints.
In the design of high-speed circuits, the signal integrity and EMI simulation analysis of the system functions are first performed using an accurate device model to determine the layout and routing of the circuit, and then the simulation is performed to improve the wiring network until satisfactory wiring results are obtained. This design mainly simulates and analyzes the reflection, delay and EMI of MCM layout and wiring in the time domain and frequency domain, and achieves better results.