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Eight Mistakes in PCB Design
Posted:01:56 PM April 28, 2018 writer: G

Comments: Automatic routing will inevitably take up a larger PCB area, and at the same time produce many times more than the manual wiring multiple vias, in a large batch of products, PCB manufacturers price reduction factors in addition to business factors, is the line width and The number of holes affects the yield of the PCB and the number of bits consumed, saves the cost of the supplier, and gives a reason for the price reduction.

2: These bus signals are pulled with resistors, which feels more comfortable.

Comments: There are many reasons why signals need to be pulled down, but not all of them need to be pulled. The pull-up resistor pulls a simple input signal, the current is also less than tens of microamperes, but pulling a driven signal, the current will reach the milliampere level, the current system is often the address data of 32 bits each, and there may be After 244/245 isolated buses and other signals are pulled up, several watts of power are consumed by these resistors.

3: How to deal with these unused I/O ports of CPU and FPGA? Let it be empty before you say it later.

Comments: If the unused I/O port is left unconnected, a little interference from the outside world can become an input signal for repeated oscillations. The power consumption of the MOS device basically depends on the number of flipping of the gate circuit. If it is pulled up, there will be micro-ampere current per pin, so the best way is to set it to output (of course, it can't connect with other signals that have drive)

4: There are so many gates left in this FPGA that can be used up.

Comments: The power consumption of FGPA is proportional to the number of flip-flops used and their number of flips, so the power consumption of FPGAs of the same model at different times of different circuits may differ by a factor of 100. Minimizing the number of flip-flops that are flipped at high speed is a fundamental way to reduce FPGA power consumption.

5: The power consumption of these small chips is very low, do not have to consider

Comments: For the internal less complex chip power is very difficult to determine, it is mainly determined by the current on the pin, an ABT16244, no load, then power consumption is probably less than 1 mA, but its indicator is each foot Can drive 60 mA load (such as matching tens of ohms resistance), that is, full-load power consumption up to 60 * 16 = 960mA, of course, only the power supply current is so large, the heat falls on the load body.

6: There are so many control signals in the memory. I only need to use the OE and WE signals on this board. The chip selects the ground, so the data comes out much faster when reading.

Comments: Most memory power consumption when the chip select is valid (regardless of OE and WE how) will be more than 100 times more than when the chip select is invalid, so it should be possible to use CS to control the chip, and in the case of meeting other requirements It is possible to shorten the width of the chip select pulse.

7: How do these signals overshoot? As long as it matches well, it can be eliminated

Comments: In addition to a few specific signals (such as 100BASE-T, CML), there are overshoots, as long as they are not large, they do not always need to be matched, even if the match is not to match the best. The output impedance like TTL is less than 50 ohms, and some are even 20 ohms. If such a large matching resistor is used, the current is very large, the power consumption is unacceptable, and the signal amplitude is too small to be used. Furthermore, the output impedance of the general signal at the output high level and the output low level is not the same, and there is no way to achieve an exact match. Therefore, the matching of signals such as TTL, LVDS, and 422 can be accepted only by overshoot.

8: Reducing power consumption is a matter for hardware personnel. It doesn't matter with software.

Comments: The hardware is just taking a stage, but the software is singing. The access of almost every chip on the bus and the flip of each signal are almost controlled by software. If the software can reduce the number of external memory accesses (more use of register variables, Using internal CACHE etc., responding to interrupts in time (interrupts are often active low and with pull-up resistors) and other specific measures that compete 


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