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Blog / Two Ways to Create Blind and Buried Vias in Cadence Allegro

Two Ways to Create Blind and Buried Vias in Cadence Allegro

Posted: April, 2026 Writer: NextPCB Content Team Share: NEXTPCB Official youtube NEXTPCB Official Facefook NEXTPCB Official Twitter NEXTPCB Official Instagram NEXTPCB Official Linkedin NEXTPCB Official Tiktok NEXTPCB Official Bksy
  1. Table of Contents
  2. Method 1: Creating Independently via Pad Designer
  3. Method 2: Defining via B/B Via Definitions in PCB Editor
  4. Technical Discussion: How to Choose Between the Two Methods?

With the widespread adoption of High-Density Interconnect (HDI) technology in electronic products, the design of Blind Vias and Buried Vias has become increasingly common in PCB Layout. Proper blind and buried via design not only effectively increases routing density but also optimizes signal return paths.

Before configuring via settings, engineers must first complete a rigorous stackup planning process. Parameters such as stackup thickness and dielectric constants directly determine the depth and impedance performance of the vias. It is recommended that during the early design phase, you use the NextPCB Impedance Calculator to evaluate trace width and layer spacing. For proven, manufacturable stackup solutions as a real-world design reference, you can consult the NextPCB Impedance Control Stackups.

This article uses a typical 8-layer board (1+6+1 HDI structure) as an example, featuring L1-L2 blind vias, L2-L7 buried vias, and L7-L8 blind vias. We will explore two mainstream methods for creating these blind and buried vias in Cadence Allegro.

Method 1: Creating Independently via Pad Designer

The first method involves defining physical padstack files with specific start and end layers directly within the Pad Designer. This method features independent library files, making it easy to reuse them across different projects.

1. Creating L1-L2 Blind Vias
The specific stackup for this 8-layer board is shown in Figure 1. Open the "Pad_Designer" window and create a new file named "via10d4_l1-l2" (representing a 10mil outer diameter and 4mil inner diameter, from Layer 1 to Layer 2).

8-layer PCB Stackup Diagram

Figure 1: 8-layer PCB Stackup

  • First, configure the basic parameters in the "Parameters" tab as shown in Figure 2.

Pad Designer Parameters Settings

Figure 2: Parameters Tab Settings

  • Next, configure the parameters in the "Layers" tab as shown in Figures 3 and 4.

Pad Designer Layers Settings Part 1

Figure 3: Layers Tab Settings - Part 1

Pad Designer Layers Settings Part 2

Figure 4: Layers Tab Settings - Part 2

  1. Engineering Tip: In the "Layers" settings, you only need to configure the TOP, GND02 (Layer 2), and DEFAULT INTERNAL layers. Since the via only penetrates these layers, the others do not require settings. All other operations are identical to creating standard through-hole pads and will not be repeated here.

2. Creating L2-L7 Buried Vias
Continue by creating a new file in Pad Designer named "via18d8_l2-l7".

  • Configure the parameters in the "Parameters" tab as shown in Figure 5.

L2-L7 Buried Via Parameters Settings

Figure 5: Parameters Tab Settings

  • Configure the parameters in the "Layers" tab as shown in Figures 6 and 7. Save the file upon completion.

L2-L7 Buried Via Layers Settings Part 1

Figure 6: Layers Tab Settings - Part 1

L2-L7 Buried Via Layers Settings Part 2

Figure 7: Layers Tab Settings - Part 2

3. Creating L7-L8 Blind Vias
Finally, create a new file named "via10d4_l7-l8".

  • Configure the "Parameters" tab as shown in Figure 8.

L7-L8 Blind Via Parameters Settings

Figure 8: Parameters Tab Settings

  • Configure the "Layers" tab similarly to the L1-L2 process (noting the corresponding layers) and save the file. (Note: Figure 9 follows the same logic as Figure 8; no additional image is provided here).

Method 2: Defining via B/B Via Definitions in PCB Editor

The second method involves creating standard through-hole padstacks first and then using system tools within the Allegro PCB Editor environment to define their span, effectively "transforming" them into blind or buried vias.

1. Prepare Standard Vias
Create two standard through-hole pads in Pad Designer, named "VIA10D4" and "VIA18D8".

2. Define Blind/Buried Via Attributes
After opening PCB Editor, go to the top menu and select Setup → B/B Via Definitions → Define B/B Via. Configure the popup window as shown in Figure 9.

The key parameter definitions in the window are as follows:

  • Bbvia Padstack: Manually enter the name for the blind/buried via to be generated (e.g., "VIA10D4_L1-L2").
  • Padstack to Copy: Select the standard via created in Step 1 from the local library (e.g., select "VIA10D4").
  • Start Layer: Select the starting layer for the via, here choose "TOP" from the dropdown.
  • End Layer: Select the ending layer for the via, here choose "GND02" from the dropdown.

Define B/B Via Window Configuration

Figure 39: Define B/B Via Window Settings

3. Batch Add Remaining Vias
Click the "Add BBVia" button on the right side of the window to add the current definition to the list. Then, follow the same logic to create the buried via "VIA18D8_L2-L7" and the blind via "VIA10D4_L7-L8". The final configuration is shown in Figure 10.

Completed Blind/Buried Via Definitions

Figure 10: Completion of all Blind and Buried Via Definitions

4. Finalize Setup
After verifying the settings, click the "OK" button. The blind and buried vias for this PCB project are now created and ready to be called during routing.

Technical Discussion: How to Choose Between the Two Methods?

In actual hardware engineering, both methods have their specific use cases:

  • Method 1 (Independent Creation in Pad Designer): More suitable for teams establishing standardized corporate component libraries. By fixing specific layer attributes directly within the .pad file, you avoid repetitive setup in different board files, ensuring consistency.
  • Method 2 (Internal Definition in PCB Editor): Offers greater flexibility. It keeps the padstack library lean (requiring only basic through-hole libraries). For specific projects, you map the layer spans according to that project's unique stackup, which is very efficient for fast-paced R&D projects.

Regardless of the method used, it is recommended that engineers design based on real-world stackup data provided by the manufacturer to ensure that the final Gerber files align with the factory's fabrication capabilities.

 

Avoid costly fabrication errors by  NextPCB's Free DFM Check Service to verify your via-in-pad and stackup density before hitting the production line.

Tag: PCB design Blind & Buried Vias pcb layout HDI PCB blind vias PCB Stackup Pad Design Cadence Allegro