When designing the PCB board, the most consideration for our wiring is how to connect each layer to the network signal line in the most reasonable way. The denser the high-speed PCB board circuit, the greater the density of vias (VIA) is placed, and the vias can serve each layer. The role of electrical connection between.
Multi-layer circuit board PCB proofing often receives feedback from the board manufacturer "the hole is too close to the line, which exceeds the process capability", so what difficulties will there be for production if the vias are too close, and what impact does it have on product reliability?
The influence of Vias are too close
- 1. If the two are too close, it will affect the aging of PCB polishing. After drilling, the direction of the second hole is too thin, the force of the first drill is uneven and the drill tip sponge is not uniform, which will cause the drill tip to be broken, resulting in unsightly holes or PCB leakage.
- 2. The vias in the multi-layer board will have a ring on each layer of the circuit, and the surrounding environment of each layer of the ring has clamped or non-clamped lines and the environment is different. In the case that the wire is too close or the hole is too close to the hole, the CAM engineer of the PCB board factory will cut off a part of the hole ring when optimizing the file to ensure a safe distance (3mil) between the solder ring and the copper/wire of different networks.
For the following six-layer PCB, the inner hole edge to the line edge is 6 mil, the hole is 4 mil, and the ring to the line is only 2 mil (Figure 1). The effect after cutting the pad (Figure 2).
- 3. The hole position tolerance of the drilling is ≤0.05mm. When the tolerance goes to the upper limit, the following situations will occur in the multilayer board.
- (1) When the lines are dense, there will be small gaps between the vias and other elements at 360°. It is necessary to ensure a safe distance of 3mil, and the pads may be cut in multiple directions (Figure 3).
- (2) Calculated according to the source file data, the hole edge to the line edge is 6 mil, the ring is 4 mil, and the ring to the line is only 2 mil. To ensure that there is a safety distance of 3 mils between the ring and the line, 1 mil solder ring needs to be cut, and the pad is only 3 mil after cutting. When the hole tolerance offset is the upper limit of 0.05mm (2mil), the hole is only 1mil left (Figure 4).
- 4. PCB production will produce a small amount of deviation of the same directionality, the direction of the pad being cut is irregular, and the worst case will cause individual holes to break the solder ring (Figure 4-1).
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- 5. The influence of lamination deviation in the multilayer board. Taking a six-layer board as an example, two core boards + copper foil are laminated to form a six-layer board (Figure 5). During the pressing process, the core plate 1 and core plate 2 may have a deviation of ≤0.05mm when they are pressed, and the inner hole will also have an irregular deviation of 360° after pressing.
In summary, the drilling process affects the PCB yield rate and PCB production efficiency. There is no complete copper protection around the hole ring via the small hole, and the PCB open and short circuit test can pass, and there will be no problems in the early use of the product, but the long-term use reliability is not enough.
Recommendations about Near Hole
NEXTPCB recommends that the multi-layer PCB board, high-speed PCB board hole-to-hole, hole-to-line spacing:
(1) The inner layer of the multilayer board from the hole to the wire to the copper:
- 4th floor: you can ignore it
- 6 layers: ≥6mil
- 8 layers: ≥7mil
- 10 layers or more: ≥8mil
(2) The edge spacing of the inner diameter of the via:
- Same network VIA : ≥8mil(0.2mm)
- Different network VIAs: ≥12mil (0.3mm)