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Signal integrity issues in high speed PCB design
Posted:06:22 PM December 25, 2018 writer: G

The effect of pads on high speed signals

In the PCB, from a design point of view, a via is mainly composed of two parts: the middle hole and the pad around the hole. The pad has an effect on the high speed signal, which affects the effect of the package of the similar device on the device. The detailed analysis is that after the signal comes out of the IC, all the joints in the process affect the signal quality through the bonding wires, pins, package casing, pads, and solder to the transmission line. However, in actual analysis, it is difficult to give specific parameters for pads, solders, and pins. Therefore, they are generally summarized by the parameters of the package in the IBIS model. Of course, such analysis can be received at a lower frequency, but a higher precision simulation for higher frequency signals is not accurate enough. A current trend is to describe the Buffer characteristics using the V-I and V-T curves of IBIS and the package parameters using the SPICE model.

The impact of wiring topology on signal integrity

Signal integrity issues can occur when signals are transmitted along a transmission line on a high speed PCB. The influence of the wiring topology on signal integrity is mainly reflected in the inconsistency of the signal arrival times at each node, and the timing at which the reflected signals arrive at a certain node is also inconsistent, resulting in deterioration of signal quality. In general, the star topology can control the signal transmission and reflection delay by controlling several branches of the same length to achieve better signal quality.

Before using the topology, consider the signal topology node conditions, the actual working principle and the wiring difficulty. Different Buffers have inconsistent effects on the reflection of signals. Therefore, the star topology does not solve the delay of the above-mentioned digital address bus connection to FLASH and SDRAM, and thus cannot ensure the quality of the signal; on the other hand, high speed The signal is generally communicated between the DSP and the SDRAM. The rate of FLASH loading is not high, so in the high-speed simulation, as long as the waveform at the node where the actual high-speed signal works effectively, it is not necessary to pay attention to the waveform at the FLASH; the star topology comparison daisy chain In terms of topology, routing is difficult, especially when a large number of data address signals are in a star topology.

RF wiring is to choose via or bend wiring

Analyze the return path of the RF circuit, which is not the same as the signal return in high-speed digital circuits. What they have in common is the distributed parameter circuit, which is the characteristic of the calculation circuit using Maxwell equation. However, the RF circuit is an analog circuit. In some circuits, the voltages V=V(t) and current I=I(t) need to be controlled. The digital circuit only pays attention to the change of the signal voltage V=V(t). Therefore, in the RF wiring, in addition to considering the signal reflow, it is also necessary to consider the influence of the wiring on the current. That is, the bend wiring and vias have no effect on the signal current.

In addition, most RF boards are single-sided or double-sided PCBs, and there is no complete planar layer. The return path is distributed around the signal and the power supply. When simulating, it needs to be analyzed by 3D field extraction tool. The reflow of vias requires specific analysis; high-speed digital circuit analysis typically only processes multi-layer PCBs with complete planar layers, using 2D field extraction analysis, only considering signal reflow in adjacent planes, vias only as a lumped parameter R -L-C processing.

How to suppress electromagnetic interference

PCB is the source of electromagnetic interference (EMI), so PCB design is directly related to the electromagnetic compatibility (EMC) of electronic products. Focusing on EMC/EMI in high-speed PCB design will help shorten product development cycles and speed time-to-market.

The three elements of EMC are the source of radiation, the route of transmission and the victim. The propagation route is divided into space radiation propagation and cable conduction. So to suppress the harmonics, first look at the way it spreads. Power supply decoupling is to address conduction propagation, and the necessary matching and shielding is also required.

Filtering is a good way to solve the problem of EMC radiation through conduction. In addition, it can be considered from the source of interference and the victim. For interference sources, try to use an oscilloscope to check if the rising edge of the signal is too fast, there is reflection or Overshoot, Undershoot or Ringing, if any, you can consider matching; in addition, try to avoid the 50% duty cycle signal, because this signal is not even Subharmonic, more high frequency components. In terms of victims, measures such as land acquisition can be considered.

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