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Signal integrity issues for high speed DSP data acquisition
Posted:10:31 AM November 07, 2018 writer: G

1. Mechanism of signal integrity problems

The problem of signal integrity mainly includes transmission line effects such as reflection, delay, ringing, signal process and undershoot, and crosstalk between signals, etc., involving the quality of the signal on the transmission line and the accuracy of the signal timing.

Good signal quality is the key to ensuring stable timing. Signal quality problems due to reflections and crosstalk are likely to cause timing offsets and disturbances. For example, crosstalk can affect the propagation delay of a signal, resulting in no accurate logic at the rising or falling edge of the clock; reflection can cause the data signal to fluctuate around the logic threshold, affecting the rising or falling edge of the signal; Line interference can cause a certain clock offset.

Signal integrity analysis and design is the most important high-speed PCB board-level and system-level analysis and design tools, playing an increasingly important role in hardware circuit design. The key to whether a digital system works correctly is whether the signal timing is accurate. The signal delay and the transmission delay of the signal on the transmission line are closely related to the degree of damage of the signal waveform. The reasons for signal transmission delay and waveform breakage are complex and varied, but the signal integrity is destroyed by three main reasons.

1.1 Power supply, address noise. It is mainly derived from the power path and the presence of distributed inductance caused by the IC package. When the speed of the system is faster, the more I/O pins are converted in the logic state, the larger the transient current will be generated, causing the voltage fluctuations and changes on the power line and the ground line. This is what Ping Jin said. The grounding bounces back. Ground bounce is one of the main sources of noise in digital systems. The common phenomenon of ground bounce noise is that it will cause the logic operation of the system to malfunction, especially the 3.3V logic family that has become increasingly popular in recent years.

1.2. Crosstalk. When the signal is transmitted along the transmission line, it is transmitted in the form of electromagnetic waves. Electromagnetic waves contain time-varying electric and magnetic fields. Since the energy of the electromagnetic field is mainly outside the transmission line, it is known from the Maxwell equation that the time-varying field generates voltage and current in the surrounding transmission line. Then for a disturbed transmission line, this voltage and current is caused by crosstalk. Crosstalk is mainly derived from the mutual inductance and mutual capacitance formed between two adjacent conductors. Crosstalk can become more serious as the density of the printed circuit board's winding layout increases, especially for long-distance bus layouts, which are more prone to crosstalk. This phenomenon is the coupling of energy from a transmission line to an adjacent transmission line via mutual mutual inductance.

1.3. Reflections. The reason for the reflection phenomenon is that there is no proper impedance matching at both ends of the signal transmission line, and the branch layout on the printed circuit board produces a breakpoint of the characteristic impedance, the size of the via, and the impedance discontinuity caused by other interconnections. The characteristic impedance is defined as "the voltage/current ratio presented when a high frequency signal flows through a wire". Then for a certain transmission line, its characteristic impedance is a constant. The reflection phenomenon of the signal is caused by the inconsistency between the characteristic impedance of the driving end of the signal and the transmission line and the impedance of the receiving end.

2. Ways to ensure signal integrity

2.1 Suppress ground bounce

The power supply path and the distributed inductance caused by the IP package are one of the keys to determining the ground bounce. To suppress the effects of ground bounce, first reduce the distributed inductance of the IC package. When considering the configuration diagram of the IC pin, the pin position of the clock pulse signal or data/address bus should be placed closer to the chip. Second, it is based on IC packaging technology with a small distributed inductance. Table 1 lists the distributed inductance of several common IC packaging techniques. It can be seen that the surface mount package technology typically has 30% less ground bounce than the DIP package technology; then the distributed inductance at the printed circuit board end is reduced. Since the inductance is proportional to the length of the conductor and inversely proportional to the width, multilayer boards are mostly used in high speed digital systems. One or more ground planes are placed in the inner layer, and the ground plane area is quite wide, with the aim of reducing the inductance of the ground loop. In addition, the circuit should be designed to avoid causing a logic gate to drive too much load. Because if there are multiple parallel logic devices in the digital circuit. The total input capacitance is the direct sum of the input capacitance of each logic device.

2.2 Solving crosstalk problems

An undesired noise voltage signal between signals due to mutual coupling of electromagnetic fields is called signal crosstalk. “Crosstalk” is mainly derived from the mutual mutual inductance and mutual compatibility formed between two-phase leaders. Crosstalk beyond a certain value may cause the circuit to malfunction, resulting in the system not working properly. The following discusses the relationship between mutual capacitance, mutual inductance and crosstalk, and how to solve the crosstalk problem.

Capacitive coupling

Crosstalk = (ZbCm) / tr

Where Zb is the characteristic impedance of the victim line; Cm is the mutual capacitance; and tr is the rise time of the incident voltage input to the interference line.

To improve the crosstalk caused by mutual compatibility, we can start from two aspects. One is to reduce the mutual capacitance Cm by adding shielding measures in the middle of two adjacent transmission lines. Typically, a grounded shield via is added to the two copper vias to improve mutual interference. The second is to increase the rise time of the signal with more frequent transitions when the timing regulations allow.

To improve the crosstalk caused by mutual inductance, it is only a simple and feasible way to reduce the loop area formed by the current flowing through the mutual inductance. By reducing the distance between the wire and the ground plane, the parallel signal length can be reduced, the distance between the signal layer and the plane layer can be shortened, and the signal line spacing can be increased to reduce the mutual inductance of the two wires.

2.3 Improve reflection

Reflection is one of several important sources of interference. In order to improve the reflection caused by the impedance mismatch of the line, you can choose the "wiring topology" and "terminal skills" approach.

With proper wiring topology to improve reflection, there is usually no need to add additional electronic components (eg, termination resistors or clamping diodes). There are four common wiring topology methods, namely tree method, daisy chain method, star method and loop method. Among them, the tree method is the worst wiring method, which causes the largest amount of reflection, and the extra load effect and ringing phenomenon need to be treated with extra care; in terms of "reflection", the daisy chain method is the preferred wiring method. . The daisy chain method is quite suitable for the address or data bus and the wiring of the parallel terminal, basically without branch bypass. The star method is suitable for wiring of series terminations, provided that the output buffer (driver) must have low output impedance and high drive energy. The loop method is basically similar to the daisy chain method, but the loop method consumes more loop area and is less immune to common mode noise.

In addition to the wiring topology method, "terminal skills" are the most effective way to overcome the interference of reflection phenomena. The characteristic impedance of a transmission line is generally a fixed value. For the CMOS circuit, the output impedance of the driving end of the signal is relatively small, tens of Ω, and the input impedance of the receiving end is relatively large. A resistor can be matched at the receiving end of the signal (a resistor is connected in parallel at the receiving end), so that the result of the parallel connection between the matching and the receiving end can be matched with the characteristic impedance of the transmission line, and the performance of the signal is better improved. The purpose of the terminal technique is to provide a fully impedance-matched transmission line environment and to maintain potential stability.

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