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SPICE model, Verilog-AMS model and VHDL-AMS model
Posted:02:20 PM November 15, 2018 writer: G

1. SPICE model

Spice is the abbreviation of SimulationProgramwithIntegratedCircuitEmphasis. It is a powerful general-purpose analog circuit simulator that has been developed for decades. It is developed by the Department of Electrical and Computer Science at the University of California, Berkeley. In the analysis program, Spice's netlist format became the standard for the description of common analog circuits and transistor-level circuits. The first version was completed in 1972, written in Fortran, and officially released in 1975. It was released in 1988. It is designated as the national industrial standard of the United States, and is mainly used for the design and simulation of electronic systems such as IC, analog circuit, digital-analog hybrid circuit, and power supply circuit. Because the Spice simulation program adopts a completely open policy, users can modify it according to their own needs, and with good practicality, they can be quickly promoted and transplanted to multiple operating system platforms.

Since the advent of Spice, its version has been updated continuously, there are multiple versions of Spice2, Spice3, etc. The new version is mainly enhanced in circuit input, graphics, data structure and execution efficiency. It is widely believed that Spice2G5 is the most successful and effective. The later versions are only partial changes.

At the same time, a variety of commercial Spice circuit simulation tools based on the algorithm of Berkeley's Spice simulation program are also produced, running on PC and UNIX platforms, many of which are based on the original SPICE2G6 version of the source code, which is a publicly released Versions, they all do a lot of practical work on the basis of Spice. The more common Spice simulation software is Hspice, Pspice, Spectre, Tspice,

SmartSpcie, IsSpice, etc., although their core algorithms are the same, but the simulation speed, accuracy and convergence are different, among them, Synopsys' Hspice and Cadence's Pspice are the most famous. Hspice is the de facto Spice industry standard simulation software. It is the most widely used in the industry. It has high precision and powerful simulation functions, but it has no front-end input environment. It needs to prepare the netlist file beforehand. It is not suitable for primary users. For integrated circuit design; Pspice is the best choice for individual users, with a graphical front-end input environment, user-friendly interface, cost-effective, mainly used in PCB board and system level design.

The SPICE simulation software consists of a model and an emulator. Since the model is tightly integrated with the simulator, it is difficult for users to add new model types, but it is easy to add new models, just set new parameters for existing model types.

The SPICE model consists of two parts: ModelEquations and ModelParameters. Since the model equations are provided, the SPICE model can be closely coupled with the simulator's algorithm to achieve better analysis efficiency and analysis results.

The SPICE model is now widely used in electronic design for nonlinear DC analysis, nonlinear transient analysis, and linear AC analysis. Elements in the circuit being analyzed may include resistors, capacitors, inductors, mutual inductance, independent voltage sources, independent current sources, various linearly controlled sources, transmission lines, and active semiconductor devices. SPICE has a built-in semiconductor device model, and the user only needs to select the model level and give the appropriate parameters.

When using the SPICE model for SI analysis at the PCB level, integrated circuit designers and manufacturers are required to provide detailed and accurate descriptions of the SPICE model and semiconductor characteristics of the integrated circuit I/O cell sub-circuit. Since these materials are usually intellectual property and confidentiality of designers and manufacturers, only a small number of semiconductor manufacturers will provide the corresponding SPICE models while providing chip products.

The accuracy of the SPICE model analysis depends mainly on the source of the model parameters (ie, the accuracy of the data) and the scope of application of the model equations. The combination of model equations with various digital simulators may also affect the accuracy of the analysis. In addition, the SPICE model of the PCB board level has a large amount of simulation calculation, and the analysis is time consuming.

2. Verilog-AMS model and VHDL-AMS model

Compared to the Spice model and the IBIS model, the Verilog-AMS and VHDL-AMS models appear later, and are a behavioral model language. As a hardware behavioral modeling language, Verilog-AMS and VHDL-AMS are supersets of Verilog and VHDL, respectively, while Verilog-A is a subset of Verilog-AMS.

In the analog/mixed-signal (AMS) language, unlike the SPICE and IBIS models, in the AMS language, the equations describing the behavior of the components are written by the user. Similar to the IBIS model, the AMS modeling language is a stand-alone model format that can be applied to many different types of simulation tools. The AMS equation can also be written at many different levels: transistor level, I/O unit level, I/O unit group, etc. The only requirement is that the manufacturer can write an equation that describes the port input/output relationship.

In fact, the AMS model can also be used on non-electrical system components. In general, you can write a model that is simpler to speed up the simulation. A more detailed model often requires more time to simulate. In some cases, a relatively simple behavioral model is more accurate than the Spice model.

Since Verilog-AMS and VHDL-AMS are both new standards, they have only been adopted for nearly five years. So far only a few semiconductor manufacturers have been able to provide AMS models, and currently can support AMS simulators as well as SPICE and IBIS. Less. However, the feasibility and accuracy of the AMS model in PCB board-level signal integrity analysis are not inferior to the SPICE and IBIS models.

3.21999

4.12004VHDL-AMS1999

Verilog-AMS1998

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