1. What is a high speed circuit
It is generally considered that if the frequency of the digital logic circuit reaches or exceeds 45 MHz to 50 MHz, and the circuit operating above this frequency already accounts for a certain amount (for example, 1/3) of the entire electronic system, it is called a high speed circuit.
In fact, the harmonic frequency of the signal edge is higher than the frequency of the signal itself, and the rising edge and falling edge of the signal (or the transition of the signal) cause unintended consequences of signal transmission. Therefore, it is generally agreed that if the line propagation delay is greater than the rise time of the 1/2 digital signal drive terminal, then such signals are considered to be high speed signals and produce transmission line effects.
The transmission of the signal occurs at the moment the signal state changes, such as the rise or fall time. The signal passes from the driver to the receiver for a fixed period of time. If the transmission time is less than 1/2 of the rise or fall time, the reflected signal from the receiver will reach the driver before the signal changes state. Conversely, the reflected signal will arrive at the drive after the signal changes state. If the reflected signal is strong, the superimposed waveform may change the logic state.
2. The determination of high-speed signals
Above we define the preconditions for the transmission line effect, but how do we know if the line delay is greater than the signal rise time of the 1/2 drive? In general, the typical value of the signal rise time can be given in the device manual, and the propagation time of the signal is determined by the actual wiring length in the PCB design.
The delay per unit inch on the PCB is 0.167 ns. However, if there are many vias, there are many device pins, and there are many constraints on the network cable, and the delay will increase. Typically, high-speed logic devices have a signal rise time of approximately 0.2 ns. If there is a GaAs chip on the board, the maximum wiring length is 7.62 mm.
Let Tr be the signal rise time and Tpd be the signal line propagation delay. If Tr ≥ 4Tpd, the signal falls in the safe area. If 2Tpd ≥ Tr ≥ 4Tpd, the signal falls in the uncertainty region. If Tr ≤ 2Tpd, the signal falls in the problem area. For signals falling in uncertain areas and problem areas, the high-speed wiring method should be used.
3. What is the transmission line
The traces on the PCB can be equivalent to capacitors, resistors, and inductors in series and in parallel. Typical values for series resistors are 0.25-0.55 ohms/foot, which are typically high due to the insulating layer. After the parasitic resistance, capacitance, and inductance are added to the actual PCB trace, the final impedance on the trace is called the characteristic impedance Zo. The wider the wire diameter, the closer to the power/ground, or the higher the dielectric constant of the isolation layer, the smaller the characteristic impedance. If the impedance of the transmission line and the receiving end do not match, the output current signal and the final steady state of the signal will be different, which causes the signal to reflect at the receiving end, and the reflected signal will be transmitted back to the signal transmitting end and reflected back again. As the energy decreases, the amplitude of the reflected signal will decrease until the voltage and current of the signal stabilize. This effect is called oscillation, and the oscillation of the signal is often seen on the rising and falling edges of the signal.
4. Transmission line effect
Based on the transmission line model defined above, it is concluded that the transmission line has the following effects on the overall circuit design.
• Reflected signals
• Delay and Timing errors Delay & Timing errors
• Multiple crossing logic level threshold errors False Switching
• Overshoot and Undershoot Overshoot/Undershoot
• Crosstalk Induced Noise (or crosstalk)
• Electromagnetic radiation EMI radiation
4.1 Reflected signal
If a trace is not properly terminated (terminal matching), the signal pulse from the driver is reflected at the receiver, causing an unexpected effect that distorts the signal profile. When the distortion is very significant, it can cause a variety of errors, causing design failure. At the same time, the distortion-distorted signal is more sensitive to noise and can cause design failure. If the above situation is not considered enough, EMI will increase significantly, which will not only affect the design results, but also the failure of the entire system.
The main causes of reflected signals: excessively long traces; transmission lines that are not terminated, excess capacitance or inductance, and impedance mismatch.
4.2 Delay and timing errors
Signal delays and timing errors are manifested by the fact that the signal does not transition for a period of time as the signal changes between the high and low thresholds of the logic level. Excessive signal delay can cause timing errors and clutter in device functionality.
There is usually a problem when there are multiple receivers. The circuit designer must determine the worst-case time delay to ensure the correctness of the design. The reason for the signal delay is that the drive is overloaded and the trace is too long.
4.3 Multiple crossing logic level threshold errors
Signals may cross logic level thresholds multiple times during a transition, causing this type of error. Multiple crossing logic level threshold errors is a special form of signal oscillation, that is, the oscillation of the signal occurs near the logic level threshold, and crossing the logic level threshold multiple times can cause logic malfunction. Causes of reflected signals: excessively long traces, unterminated transmission lines, excessive capacitance or inductance, and impedance mismatch.
4.4 Overshoot and undershoot
Overshoot and undershoot are caused by two reasons: too long a trace or too fast a signal change. Although most components have input protection diode protection at the receiving end, sometimes these overshoot levels can far exceed the component supply voltage range and damage components.
Crosstalk is manifested by the fact that when a signal passes through a signal line, the associated signal is induced on the adjacent signal line on the PCB. This is called crosstalk.
The closer the signal line is to the ground line, the larger the line spacing and the smaller the crosstalk signal generated. Asynchronous and clock signals are more prone to crosstalk. Therefore, the method of de-interference is to remove the signal that causes crosstalk or to shield the signal that is seriously interfered.
4.6 Electromagnetic radiation
EMI (Electro-Magnetic Interference) is a problem caused by excessive electromagnetic radiation and sensitivity to electromagnetic radiation. EMI is manifested by radiating electromagnetic waves to the surrounding environment when the digital system is powered up, thereby interfering with the normal operation of the electronic equipment in the surrounding environment. The main reason for this is that the circuit operating frequency is too high and the layout is unreasonable. At present, there are software tools for EMI simulation, but the EMI simulator is very expensive, and the simulation parameters and boundary conditions are difficult to set, which will directly affect the accuracy and practicability of the simulation results. The most common approach is to apply the various design rules that control EMI to every step of the design, enabling rule-driven and control over all aspects of the design.