Choosing PCB boards must strike a balance between meeting design requirements and mass production and cost. Design requirements include both electrical and institutional components. This material problem is usually more important when designing very high speed PCB boards (greater than GHz). For example, the commonly used FR-4 material, dielectric loss at several GHz frequencies can have a large impact on signal attenuation and may not be useful. As far as electrical is concerned, it is important to note whether the dielectric constant and the dielectric loss are combined at the designed frequency.
2. How to avoid high frequency interference?
The basic idea of avoiding high-frequency interference is to minimize the interference of high-frequency signal electromagnetic fields, which is called crosstalk. You can use the distance between the high-speed signal and the analog signal, or add ground guard/shunt traces next to the analog signal. Also pay attention to the digital ground noise interference to the analog ground.
3. How to solve signal integrity problems in high-speed design?
Signal integrity is basically a matter of impedance matching. The factors affecting the impedance matching are the architecture of the signal source and the output impedance, the characteristic impedance of the trace, the characteristics of the load end, and the topology of the trace. The solution is to terminate and adjust the topology of the trace.
4. How is the differential wiring method implemented?
There are two points to note about the wiring of the differential pair. One is that the length of the two lines should be as long as possible, and the other is that the spacing between the two lines (which is determined by the differential impedance) should remain the same, that is, to be parallel. There are two ways of paralleling. One is that the two lines are on the same side-by-side, and the other is two lines that are on the top-by-side. In general, the former side-by-side implementation is more.
5. How to implement differential wiring for a clock signal line with only one output?
To use differential routing, it must be meaningful that both the source and the receiver are differential signals. Therefore, differential wiring cannot be used for a clock signal with only one output.
6. Can a matching resistor be added between the differential pairs at the receiving end?
The matching resistance between the differential pair of the receiving end is usually added, and its value should be equal to the value of the differential impedance. This signal quality will be better.
7. Why is the wiring of the differential pair close and parallel?
The wiring of the differential pairs should be properly close and parallel. The proper proximity is because this spacing affects the value of the differential impedance, which is an important parameter in designing the differential pair. Parallelism is also required because the consistency of the differential impedance is maintained. If the two lines are too close, the differential impedance will be inconsistent, which will affect signal integrity and timing delay.
8. How to deal with some theoretical conflicts in the actual wiring?
8.1. Basically, it is right to isolate the analog/digital partitions. It should be noted that the signal trace should not cross the moat as much as possible, and do not let the return current path of the power supply and signal become too large.
8.2. The crystal oscillator is an analog positive feedback oscillator circuit. To have a stable oscillation signal, the loop gain and phase specifications must be met. The oscillation specifications of this analog signal are easily disturbed. Even if ground guard traces are added, the interference may not be completely isolated. . And too far away, the noise on the ground plane will also affect the positive feedback oscillator circuit. Therefore, be sure to bring the distance between the crystal and the chip closer.
8.3. There are many conflicts between high-speed wiring and EMI requirements. However, the basic principle is that the resistors and capacitors or ferritebead added by EMI cannot cause some electrical characteristics of the signal to fail to meet the specifications. Therefore, it is best to use the techniques of routing and PCB stacking to solve or reduce EMI problems, such as high-speed signals going inside. Finally, use resistors or ferrite bead to reduce the damage to the signal.
9. How to solve the contradiction between manual wiring and automatic wiring of high-speed signals?
Most of the autorouters of the current wiring software have set constraints to control the winding method and the number of vias. The setting requirements for the winding engine capabilities and constraints of each EDA company are sometimes quite different. For example, is there enough constraint to control the serpentine 蜿蜒, whether it can control the spacing of the differential pairs, and so on. This will affect whether the routing method that is automatically routed can meet the designer's ideas. In addition, the difficulty of manually adjusting the wiring is also absolutely related to the ability of the winding engine. For example, the ability to push the line, the ability to push through the hole, and even the ability of the wire to push the copper. Therefore, choosing a router with a strong winding engine is the solution.
10. About the test coupon.
The test coupon is used to measure the characteristic impedance of the PCB produced by TDR (Time Domain Reflectometer) to meet the design requirements. Generally, the impedance to be controlled has a single line and a differential pair. Therefore, the line width and line spacing (when there is a differential pair) on the test coupon are the same as the line to be controlled. The most important thing is the position of the grounding point when measuring. In order to reduce the inductance of the ground lead, the TDR probe is usually grounded very close to the probe tip, so the distance and way of measuring the signal's point to the ground point on the test coupon To match the probe used.
11. In high-speed PCB design, the blank area of the signal layer can be coated with copper, and how should the copper of multiple signal layers be distributed on the ground and the power supply?
Generally, most of the copper in the blank area is grounded. Just pay attention to the distance between the copper and the signal line when applying copper next to the high-speed signal line, because the copper applied will reduce the characteristic impedance of the trace. Also be careful not to affect the characteristic impedance of its layer, such as in the structure of a dual stripline.
12. Can I calculate the characteristic impedance using the microstrip line model on the signal line above the power plane? Can the signal between the power supply and the ground plane be calculated using the stripline model?
Yes, both the power plane and the ground plane must be considered as reference planes when calculating the characteristic impedance. For example, a four-layer board: top layer - power layer - ground layer - bottom layer, then the model of the top trace characteristic impedance is a microstrip line model with the power plane as a reference plane.
13. Automatically generate test points through high-density printed boards through software. Under normal circumstances can meet the test requirements for mass production?
Whether the general software automatically generates test points to meet the test requirements must see whether the specifications of the test points meet the requirements of the test equipment. In addition, if the wiring is too dense and the specification of the test points is strict, there may be no way to automatically add test points to each line. Of course, it is necessary to manually fill in the places to be tested.
14. Will adding test points affect the quality of high-speed signals?
As for whether it will affect the signal quality, it depends on how the test points are added and how fast the signal is. Basically add test points (without vias or DIP pins as test points) may be added online or pulled a short line from the line. The former is equivalent to adding a small capacitor on the line, while the latter is a branch. Both of these conditions will affect the high-speed signal more or less, and the degree of influence is related to the frequency speed of the signal and the edge rate of the signal. The size of the impact can be seen through simulation. In principle, the smaller the test point, the better (and of course the requirements of the test tool). The shorter the branch, the better.
15. How many PCBs form the system, and how should the ground wires between the boards be connected?
When the signal or power supply between the PCB boards is connected, for example, the A board has power or signal sent to the B board, there must be an equal amount of current flowing from the ground to the A board (this is the Kirchoff current law). The current on this formation will flow back where the impedance is the least. Therefore, at each interface where the power source or signal is connected to each other, the number of pins allocated to the ground layer should not be too small to reduce the impedance, which can reduce the noise on the ground layer. In addition, you can also analyze the entire current loop, especially the larger current, adjust the ground or ground connection to control the current travel (for example, make a low impedance somewhere, let most of the current from this Place to reduce the impact on other sensitive signals.
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