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Key Issues in High Speed ​​and HDI PCB Design

Posted:05:14 PM October 08, 2018 writer: G

Compared with traditional PCB design, high-speed and high-density PCB design has several key technical problems, and new design techniques need to be developed. There are many theoretical and technical issues to be further studied. At the same time, the requirements for high-speed and high-density PCBs are getting higher and higher, which makes high-speed and high-density PCB design face new problems constantly; a large number of relevant research results continue to emerge, driving the development of high-speed and high-density PCB design technology. This article describes the key technical issues of high-speed, high-density PCB design (signal integrity, power integrity, EMC / EM I and thermal analysis) and new advances in related EDA technologies, and discusses several important trends in high-speed, high-density PCB design.

Key technical issues

Key technical issues in high-speed, high-density PCB design are signal integrity (SI), power integrity (P I), EMC /EM I, and thermal analysis.

Signal integrity

Signal integrity primarily refers to the quality of the signal transmitted on the signal line. 1 When the circuit signal reaches the pin of the receiving chip at the required timing, duration, and voltage amplitude, the circuit has good signal integrity. Signal integrity issues arise when the signal does not respond properly or the signal quality does not stabilize the system for long periods of time. Signal integrity problems are mainly manifested by: delay, reflection, overshoot, ringing, crosstalk, timing, synchronous switching noise, EM I, etc.

Signal integrity issues can directly lead to signal distortion, timing errors, and the generation of erroneous data, addresses, and control signals, causing system errors or even paralysis. Generally, for a digital chip, the level above V IH is a logic 1, the level below V IL is a logic 0, and the level between VIL and VIH is an indeterminate state. For a digital signal with ringing, when the oscillation level enters the uncertainty region of VIL ~ VIH, it may cause a logic error. The transmission of digital signals must have the correct timing. The general digital chip requires that the data must be stable before the tsetup of the clock trigger edge to ensure the logic timing is correct. If the signal transmission delay is too long, the correct logic may not be received at the rising or falling edge of the clock, causing timing errors.

The causes of signal integrity problems are more complicated. The parameters of components, PCB parameters, the layout of components on the PCB, and the wiring of high-speed signals are all important factors affecting signal integrity. Signal integrity is a systemic issue, and the study and resolution of signal integrity issues must use a systemic perspective.

Relatively speaking, people have studied the signal integrity problem for several decades, and have achieved many important theoretical and technical achievements and accumulated rich experience. Many signal integrity technologies have matured and are widely used.

Power integrity

Power integrity mainly refers to the high-speed system, the power distribution system (PDS) at different frequencies, the impedance characteristics are different, so that the voltage between the power layer and the ground layer on the PCB is not the same everywhere in the board, resulting in The power supply is not continuous, generating power supply noise, making the chip not working properly. At the same time, due to high frequency radiation, power integrity issues can also cause EMC / EM I problems. In high-speed, low-voltage circuits, the danger of power supply noise is particularly serious.

Power integrity is due to the large errors in signal integrity analysis based on wiring and device models without regard to the effects of the power supply.

Relatively speaking, the research on power integrity started late, and the theoretical research and technical means are still not mature enough. It is one of the biggest challenges of high-speed and high-density PCB design. At present, it is mainly to adopt some common measures to minimize the adverse effects caused by power integrity problems to a certain extent. The main measures taken are to optimize the lamination, layout and layout of the PCB; the second is to increase the decoupling capacitor appropriately. When the system frequency is less than 300 ~ 400 MHz, setting the appropriate capacitor at the appropriate position helps to reduce the impact of power integrity issues. However, when the system frequency is higher, the decoupling capacitor has a small effect. In this case, the impact of power integrity issues can only be reduced by optimizing the PCB design.


EMC (electro-magnetic compatibility) is usually defined as: "The ability of a device or system to function properly in its electromagnetic environment and does not constitute unacceptable electromagnetic disturbances to anything in the environment." Also defined as: "It is limited in research." Space, limited time and limited spectrum resources, a variety of electrical equipment (subsystems, systems, and broadly including organisms) can coexist without causing a downgrade of science."

EMC mainly studies two aspects of EM I (electro-magnetic interference) and EMS (electro-magnetic suscep tibility). The EM I is generated because the electromagnetic interference source transfers energy to the sensitive system through the coupling path. It consists of three basic forms of conduction by wires and common ground, by spatial radiation or by near-field coupling.

EMC of electronic products is very important. At present, many countries and regions have strict and complete EMC standards. More and more electronic products must pass relevant EMC test certification before they can enter the market. Moreover, as the electromagnetic environment deteriorates, the EMC requirements for electronic products will become higher and higher.

Relatively speaking, the EMC problem is the most complicated. When the rise time or fall time is reduced from 5 ns to 2.5 ns, EM I will increase by about 4 times. The spectral width of EM I is inversely proportional to the rise time. The radiation intensity of 1EM I is proportional to the square of the frequency. 1 The frequency range of EM I radiation is about tens of MHz to several GHz. The wavelengths corresponding to these high frequencies are very short, and short connections on the PCB or even interconnects within the chip can be an efficient transmitting or receiving antenna, causing serious EMC problems. Henry W Ott, President of Henry Ott Consulting, highlighted in a keynote speech at the PCB Design Conference-East: "In the era of high-speed design, PCB designers will face more if they don't understand EMC more. Many unexpected problems.” “Because of the faster design and the increasing popularity of wireless design, EMC will be a bigger challenge.”

Due to the complexity of EMC and the increasing demand for EMC from modern electronics, EMC technology will be an important area for long-term research. At present, the prevention and resolution of EMC problems mainly follows some common PCB design constraint rules. However, if specific rules are adopted and the effects are effective, specific analysis of specific problems must be made, which depends to a large extent on the theoretical level and practical experience of the designers.

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