PCB process skills based on GENESIS2000 software (3)

writer: G April 04, 2019

7. Solder mask

a. Select the component surface circuit layer, use DFM→Solder Mask Opt function for resistance welding optimization, ERF parameter select SHENNAN-E80, Clearance Opt parameter setting see b;

b. The solder mask opening window should be as large as possible under the condition of the spacing (except for single-side solder mask opening ≥3mil, copper foil thickness ≥3OZ). This solves the problem of alignment of the field board and the problem of the pad on the ink.

The specific manufacturing method and steps of the CAM board: the selection of the solder mask optimization parameters is determined according to the minimum spacing of the line at the window of the pad. The GENESIS 2000 CAM software we use now, solder masking can only be optimized by one value. Solder mask optimization parameter clearance (min) + coverage(min) = spacing(min) , where clearance: pad solder mask opening window;

Coverage: the distance from the window to the line;

Spacing: The minimum spacing of the line.

The selection method of the solder mask optimization parameters is:

When the line spacing is ≥ 4 mil, clearance (min) is 2.5 mil; clearance (opt) is 3.0 mil (depending on the spacing, ≥ 3 mil defaults to 3 mil); coverage (min) 1.5 mil; coverage (opt) 1.5 mil. In this way, the place where the spacing between the plates is large can be 3 mils, and the place with smaller spacing cannot reach 3 mils and is made by 2.5 mils.

c. Simultaneously open the pre-optimized and optimized graphics of the component surface solder mask, and the visual inspection has no obvious size and shape change;

d. Use Analysis→Fabrication→Solder Mask Checks function to analyze whether the optimized component surface soldering meets the requirements of Table 11. If it does not meet the requirements, it should be manually adjusted until the analysis is qualified;

e. Select layer 1, use Actions→reference Selection function to select gts layer to select, parameter Mode select Disjoint, close lines, Surfaces, Text, Arcs&Circles button, select the hole of the solderless unopened window and copy it to a new layer of tmp. In tmp, the aperture is changed to the finished aperture and then moved to the component surface solder mask to remove the tmp layer;

f. moving the Pads in the gts layer back to the component surface solder mask;

g. Move the Lines in the gts layer back to the component surface solder mask;

h. Check the number of pads on the component surface solder mask equal to the number of pads on the component surface circuit layer + the number of NPTH holes;

i. Solder mask solder mask is made in the same way.

8. BGA plug hole

a. Copy the BGA pads of the component plane layer and the solder plane layer to a new layer of 2mm;

b. Change all the pad sizes in the 2mm layer to s4000μm, and fill in the blank space in the middle of the block;

c. Select the drilling layer, use the Actions→reference Selection function to select the 2mm layer to select, the parameter Mode selects Touch, copy all the holes that touch the 2mm layer (ie the holes in the BGA2mm range) to Job.bga, and copy Job.bga is Job.sdb;

d. Change the aperture in Job.bga (plug template) and Job.sdb (plug hole plate);

e. Select the D11 layer, use the Actions→reference Selection function to select the Job.bga layer to select, the parameter Mode selects Touch, delete all the pads that touch the Job.bga layer, and the number of deletions should be the same as the number of plug holes;

f. Select the solder mask, open the Feature selection filter function in the panel, select the large solder pad and the small window pad in the solder mask layer and the finished hole in the Include Symbols, and use the Actions→reference Selection function to refer to the Job.bga layer. Select, the parameter Mode selects Touch, and the pad that touches the Job.bga layer is deleted.

9. Network comparison

a. Open the Actions→Netlist Analyzer function, Step selects orig and edit respectively, Type selects current, press Recalc button respectively;

b. After Recalc is completed, change the previous current to Reference, press Update, and pop up the Ref Netlist Update dialog box. Select Set to CUR netlist in the Action and press OK.

c. Press compare to compare the network relationship between orig and edit. If the shorted and broken are not red, the result is correct.

10. Character layer

A. Modify the character line width;

b. Select the mark in the Special symbols to be placed according to the customer's request. The mark should be placed in the blank space, and the solder resistance, shape and copper surface of the line should not be touched;

c. Production D10;

d. Copy the D10 layer to the corresponding character layer, and Invert select No.